| 02 |
If the CPU is in protected mode, turn on gate A20 and pulse the reset line. Forces a shutdown 0. |
| 04 |
On cold boot, save the CPU type information value in the CMOS |
| 06 |
Reset DMA controllers; Disable video; Clear pending interrupts from real time clock; Setup port B register |
| 08 |
Initialize chipset control registers to power on defaults |
| 0A |
Set a bit in the CMOS that indicates POST; used to determine if the current configuration causes the BIOS to hang. If true, default BIOS values set on next POST |
| 0C |
Initialize I/O module control registers |
| 0E |
External CPU caches initialized; Cache registers set to default values |
| 10/12/14 |
Verify response from 8742 keyboard controller |
| 16 |
Verify BIOS ROM checksums to zero |
| 18 |
Initialize all three 8254 programmable interrupt timers |
| 1A |
Initialize DMA command register; Initialize 8 DMA channels |
| 1C |
Initialize 8259 programmable interrupt controller; ICW4 needed; Cascade and edge triggered mode |
| 20 |
Test DRAM refresh by polling refresh bit in post B |
| 22 |
Test 8742 keyboard controller; Self test send to keyboard controller and awaiting results; Read the switch inputs from the 8742 keyboard controller and write the keyboard controller command byte |
| 24 |
Set ES segment register to 4GB |
| 26 |
Enable address line A20 |
| 28 |
Autosize DRAM |
| 2A |
Clear first 64K of RAM |
| 2C |
Test RAM address lines |
| 2E |
Test first 64K bank of memory by checking chip address line test and RAM test |
| 30/32 |
Find true CPU speed (MHz) |
| 34 |
Clear CMOS diagnostic byte (register E); Check real time clock and verify battery; Checksum the CMOS and verify for corruption |
| 36/38/3A |
External cache is autosized and its configuration for enabling later in POST |
| 3C |
Configure advanced cache features; Configure external cache's configurable parameters |
| 3E |
Read hardware configuration from keyboard controller |
| 40 |
Set system power-on speed to the rate determined by the CMOS; If the CMOS is invalid, use a lower speed |
| 42 |
Initialize interrupt vectors 0-77h to the BIOS general interrupt handler |
| 44 |
Initialize interrupt vectors 0-20h to proper values from the BIOS interrupt tables |
| 46 |
Check copyright message checksum |
| 48 |
Check video configuration |
| 4A |
Initialize both monochrome and color graphics video adapters |
| 4C/4E |
Display copyright message |
| 50 |
Display CPU type and speed |
| 52 |
Test for the self-test code if a cold start; Keyboard performs a self-test and sends and AA if successful |
| 54 |
Initialize keystroke clicker during POST |
| 56 |
Enable keyboard |
| 58 |
Test for unexpected interrupts; Check STI for hot interrupts; Test NMI for unexpected interrupts; Enable parity checkers and read from memory checking for unexpected interrupt |
| 5A |
Display prompt "Press F2 to Enter Setup" |
| 5C |
Determine and test the amount of memory available; Save total size to BIOS variable called bdaMemorySize |
| 5E |
Perform address of base memory |
| 60 |
Determine and test the amount of extended memory available; Save the total size in the CMOS at CMOSExtended |
| 62 |
Perform and address line test on A0 to the amount of memory available |
| 68 |
External and CPU caches, if present, are enabled |
| 6A |
Display cache size on screen if non-zero |
| 6C |
Display BIOS shadow status |
| 6E |
Display the starting offset of the non-disposable section of the BIOS |
| 70 |
Check flags in CMOS and in the BIOS data area to see if any errors have been detected during the POST |
| 72 |
Check status bits for configuration errors |
| 74 |
Test real time clock if the battery has lost power |
| 76 |
Check status bits for keyboard errors; Errors are displayed |
| 78 |
Check for stuck keys on the keyboard; Errors are displayed |
| 7A |
Enable keylock |
| 7C |
Setup hardware interrupt vectors |
| 7E |
Test coprocessor if present |
| 80/82 |
Detect and install RS232 ports |
| 84 |
Detect and install parallel ports |
| 86/88 |
Initialize timeouts/key buffer/soft reset flags |
| 8A |
Initialize extended BIOS data area and initialize the mouse |
| 8C |
Initialize the floppy disks and display error message if failure was detected |
| 8E |
Hard disk autotype detection |
| 90 |
If the CMOS RAM is valid and intact and fixed disks are defined, call the fixed disk initialization routine to initialize the fixed disk system and take over the appropriate interrupt vectors |
| 92/94 |
Disable gate A20 address line |
| 96/98 |
Scan for ROM BIOS extensions |
| 9E |
Enable hardware interrupts |
| A0 |
Set time of day |
| A2 |
Setup numlock indicator |
| A4 |
Initialize typematic rate |
| A6 |
Initialize hard disk autoparking |
| A8 |
Erase F2 prompt |
| AA |
Scan for F2 keystroke |
| AC |
Check to see if SETUP should executed |
| AE |
Clear ConfigFailedBit and InPostBit in CMOS |
| B0 |
Check for POST errors |
| B2 |
Set/clear status bits to reflect POST complete |
| B4 |
One beep |
| B6 |
Check for password before boot |
| B8 |
Clear global descriptor table |
| BA |
Initialize the screen saver |
| BC |
Clear parity error latch |
| BE |
Clear screen |
| C0 |
Try to boot with interrupt 19 |
| D0/D2 |
If an interrupt occurs before interrupts vectors have been initialized, interrupt handler will check if 8259 programmable interrupt timer caused the interrupt and which one; If error is unknown, InterruptFlag will be FF, otherwise, it will hold the IRQ number that occurred |
| D4 |
Clear pending timer and keyboard interrupts and transfer control to the double word address located at RomCheck |
| D6/D8/DA |
Return from extended block move |