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Zenith BIOS POST Codes

 

 

Zenith BIOS Post Procedures

CPU Perform a read/write test on the internal register.  Check for defective CPU or clock generator
ROM BIOS Check the CRC value stored in ROM against the computed value of this test.  Check the BIOS or I/O circuitry
RAM Check first 64K of memory to see that data can be stored in it so the BIOS can use it later
DMA Test the register functions of the DMA chips
PIT/PIC Perform tests on the main support chips and enable the appropriate interrupts when completed.  Check also for AC ripple
RTC/CMOS Check the validity of the CMOS RAM and compare the value in CMOS with appropriate devices.  The BIOS will use the values from the CMOS to set up appropriate IRQ routines for disk and other I?O access.   Check for defective CMOS, battery, adapter or CMOS setting
Video Display Attempts will be made to initialize video to a mono screen very early on so error messages can be displayed.  This test is for initializing upper video modes available with EGA/VGA
Test and Boot to Diskette Check the floppy subsystem and prepare the drive for boot if there is a bootable floppy in the A: drive
Boot to Fixed Disk Initialize any fixed disks in the CMOS and give control to the first one if a bootable floppy has not been detected previously.   Check for corrupt boot code if not a hardware error

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Zenith BIOS Post Codes

01 VGA check
02 MDA initialize
03 Initialize video
05 Set hard reset
07 Check ROM at E000
08 Check ROM shadow at F000
09 Remap video ROM at E000
0C CMOS RAM/8042 keyboard controller test
0D DMA controller test
0E DMA page register test
0F Test 64K base RAM
10 Test base memory
11 Second VGA unit
12 mono initialization
13 Real time clock/CMOS RAM test
15 CPU register test
16 CPU addition test
17 Real time clock/8042 keyboard controller test
18 Enter protected mode
19 Testing memory
1A Test extended memory
1B Leaving protected mode
1C Testing system board
1D Testing system board
1E Testing system board
1F Bus sizing
20 Set BIOS data area
21 Testing DMA controller
22 checking C800 for ROM
24 Testing base memory
25 8042 keyboard controller test
26 8042 keyboard controller test
27 8042 keyboard controller test
28 Memory parity test
29 Programmable interrupt timer test
2A Testing floppy disk drive(s)
2B Testing floppy drive controller and drive(s)
2C Testing hard disk controller and drive(s)
2D Checking CMOS settings
2E Soft configuration
30 Checking adapter ROM's
31 Checking CMOS settings
32 Enabling interrupts
33 Soft configuration
34 Soft configuration
35 Jump to boot code
00 Booting the operating system

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Zenith Orion 4.01E BIOS Post Codes

02 Cold boot; Enter protected mode
03 Initialize the main system board
F0 Begin basic system hardware initialization
F1 Clear CMOS status locators
F2 Starting CLIO initialization
F3 Initialize SYSCFG register
F4 DXPI initialization for boot block
F5 Switching cache off
F6 Configure CPU socket pins
F7 Checking for 80387SX math coprocessor
F8 82C206 default initialization
F9 Superior default initialization
FF End of machine specific boot block
04 Check flash checksum
05 Flash ok; jump into flash code (FFFD flash code)
06 Reset or power up
07 CLIO default initialization command
08 SYSCFG register initialized
09 CMOS pre flush error words initialization
10 SCP initialization
11 DRAM autosizing complete
12 Parity check enabled
13 Start of slushware test
14 Slushware at 000F0000h ok
15 BIOS ROM copied to slushware
16 Back in real mode
17 BIOS ROM slushing is complete
18 Video ROM test at C0000
19 Internal video ROM tested
1A Back in real mode
1B Internal video hardware completed
1C CPU clock frequency determined
1E BIOS RAM cleared
20 Reset
21 Continue after setting memory size
22 Continue after memory test
23 Continue after memory error
24 Continue after boot loader request
25 Jump to execute user code
26 Continue after protected mode test passed
27 Continue after protected mode test failed
28 Continue after extended protected mode failed
29 Continue after block move
2A Jump to execute user code
2B Reserved
2C Reserved
2D Reserved
2E Reserved
2F Reserved
30 Exit from protected mode
31 Test reset passed
32 Check for ROM checksum; Warm boot
33 Clear the video screen on
34 Check system DRAM config update CMOS TOTAL MEM SIZE value
35 Preload CMOS; Check CMOS contents
36 Turn off the UMB RAM
37 Turn parity generation
38 Initialize system variable
39 Check for error in power
3A Initialize SCP mode
3B Test CMOS diagnostics power reset
3C Test CPU reset 80386 and determine state number
3D Save CPU ID and processor T
3E Initialize the video and timers
3F Initialize DMA controller ports; Clear page
40 Set speed to fast for now
41 Test EEPROM checksum
42 Enable/disable parallel/serial ports, floppy disk controller, hard disk controller
43 Flush external video BIOS if on CMOS
44 Turn cache off for memory
45 Test extended RAM from 0-16K
46 Test base RAM from 0-64K
47 Determine amount of memory in system
48 Set warm boot flag
49 Clear 16K of base RAM
4A Install BIOS interrupt vector
4B Test system timer
4C Initialize interrupt
4D Enable default hardware initialization
4E Determine global I/O configuration
4F Initialize video
50 Initialize WD90C30 scratchpad
51 Check for errors before boot
52 Reserved
53 Test system and initialize
54 Reserved
55 Initialize the keyboard processor
56 Initialize the PS/2 mouse
57 Configure CLIO for mouse
58 Configure CLIO for LAN
59 Configure CLIO for SCSI
5A Configure CLIO for WAM
5B Wait for user to enter code
5C Initialize system clock TOD
5D Test and initialize floppy drive sensor
5E Check for Z150 style disk
5F Initialize Winchester hard disk subsystem
60 Set default I/O device parameters
61 Get LAN ID info from LAN
62 Install ROM's at 0C8000h
63 Install ROM's at 0E000h
64 Initialize SCSI interface
65 Run with gate A20 off
66 Really turn off the SCP
67 Set machine speed using CMOS
68 Turn off cache
69 Calibrate 1ms constants
6A Enable non-maskable interpreter
6B reserved
6C Clear the warm boot flag
6D Check for errors before boot
6E Call to interrupt 19 boot loader

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Zenith 191 BIOS Post Codes

00 Start of Slush test
01 Processor test
02 cache and CLIO
03 ISP defaults set
04 Entering protected mode
05 Memory SIMM's count
06 Memory controller test
07 Prepared to test block
08 first 1Mb of RAM tested
09 Checksum OEM ROM
10 Lao flash ROM checks
11 F000 ROM checks
12 Aurora video ROM
13 F000 ROM slushed
14 SEP initialized
15 Language slushed
16 Perform video specific tests
17 Done slushing
32 Point interrupt vectors
33 turn on parity generation
34 Initialize system variables
35 Initialize interrupt controllers
36 Check error that occurred
37 Reinitialize SCP warm boot
38 Test CMOS diagnostics, power and reset
39 Reserved or DDNIL status flag check
3A Test CPU reset if 80386
3B Save the CPU ID in GS
3C Slush video ROM at C0000
3D Initialize the video and timers
3E Initialize CMA ports; Clear page
3F Set speed too fast for now
40 Checksum the nonvolatile RAM
41 Initialize configuration
42 Initialize expansion boards from VRAM
43 Turn cache off for memory test
44 Initialize memory counter; Test extended memory
45 Test base RAM
46 Determine amount of system RAM
47 Test and initialize cache if installed
48 Test system timer tick
49 Initialize the write queues
4A Initialize monitor RAM
4B Clear 16K of base RAM
4C Install BIOS interrupt vectors
4D Enable default hardware initialization
4E Determine global I/O configuration
4F Reserved
50 Initialize video
51 Initialize WD90C30 scratchpad register
52 Initialize the keyboard controller
53 Turn off IRQ 12 if mouse is off
54 Wait for user to enter correct password
55 Initialize system clock time of day
56 Test and initialize floppy drive controller
57 Initialize Winchester subsystem
58 Install ROM's starting at C80000h
59 Install ROM's starting at E0000h
5A Initialize SCSI interface
5B Set default I/O device parameters
5C Initialize cache speed and clock
5D Always tell system ROM cold
5E Run with gate A20 off in PC mode
5F Really turn off the SCP
60 Set machine speed using CFG
61 Turn on cache if machine halt
62 Calibrate 1ms constants
63 Enable NMI
64 Test for errors before boot
65 Call interrupt 19 boot loader

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